差别
这里会显示出您选择的修订版和当前版本之间的差别。
|
uncategorized_opencore [2020/08/11 18:54] xiesen 创建 |
uncategorized_opencore [2020/08/11 19:49] (当前版本) xiesen |
||
|---|---|---|---|
| 行 35: | 行 35: | ||
| [[https://opencores.org/projects/manchesterencoderdecoder|Manchester Encoder / Decoder]]\\ | [[https://opencores.org/projects/manchesterencoderdecoder|Manchester Encoder / Decoder]]\\ | ||
| [[https://opencores.org/projects/matrixdetermprocessor|Matrix Determinant Processor]]\\ | [[https://opencores.org/projects/matrixdetermprocessor|Matrix Determinant Processor]]\\ | ||
| + | [[https://opencores.org/projects/mcu|mcu]]\\ | ||
| + | [[https://opencores.org/projects/md5|MD5 Hash Core RFC 1321]]\\ | ||
| + | [[https://opencores.org/projects/milstd1553bbusprotocol|mil std 1553b]]\\ | ||
| + | [[https://opencores.org/projects/mini-acex1k|Mini-ACEX1K]]\\ | ||
| + | [[https://opencores.org/projects/processor|mips single cycle microprocessor]]\\ | ||
| + | [[https://opencores.org/projects/mpeg4_video_coding|MPEG-4 Video Coding]]\\ | ||
| + | [[https://opencores.org/projects/fftprocessor|Multiplierless 64 point FFT Processor]]\\ | ||
| + | [[https://opencores.org/projects/neot|NeoT]]\\ | ||
| + | [[https://opencores.org/projects/design_dsp320tmsc10_with_vhdl|ngocminh]]\\ | ||
| + | [[https://opencores.org/projects/nonrestoringsquareroot|nonrestoringsquareroot]]\\ | ||
| + | [[https://opencores.org/projects/ppcnorthbridge|NorthBridge (PPC)]]\\ | ||
| + | [[https://opencores.org/projects/ntsc_vid_encoder|ntsc video encoder]]\\ | ||
| + | [[https://opencores.org/projects/ocmips|ocmips]]\\ | ||
| + | [[https://opencores.org/projects/omega|Omega CPU - Alpha like clone]]\\ | ||
| + | [[https://opencores.org/projects/opb_ps2_keyboard_controller|OPB-compatible PS/2 Keyboard Controller]]\\ | ||
| + | [[https://opencores.org/projects/opb_udp_transceiver|OPB-compatible UDP transceiver]]\\ | ||
| + | [[https://opencores.org/projects/open_1394_intellectual_property|open 1394 intellectual property]]\\ | ||
| + | [[https://opencores.org/projects/opencpu678085|openCPU 67-80-85]]\\ | ||
| + | [[https://opencores.org/projects/opentech|OpenTech Cd-rom]]\\ | ||
| + | [[https://opencores.org/projects/wpf|Packet Filter]]\\ | ||
| + | [[https://opencores.org/projects/pci_ide_controller|PCI to IDE Controller core]]\\ | ||
| + | [[https://opencores.org/projects/performance_counter|Performance counter for Microblaze]]\\ | ||
| + | [[https://opencores.org/projects/pipelined_dct|Pipelined 8-point DCT]]\\ | ||
| + | [[https://opencores.org/projects/phoenix_controller|pnctl]]\\ | ||
| + | [[https://opencores.org/projects/profibus_dp|Profibus]]\\ | ||
| + | [[https://opencores.org/projects/programmabledct|Programmable DCT Accelarator with 16 bit Microcontroller]]\\ | ||
| + | [[https://opencores.org/projects/radiohdl|RadioHDL]]\\ | ||
| + | [[https://opencores.org/projects/rc5_decoder|rc5]]\\ | ||
| + | [[https://opencores.org/projects/project|RISC CPU (DLX) in SystemC]]\\ | ||
| + | [[https://opencores.org/projects/scsi_interface|SCSI Interface]]\\ | ||
| + | [[https://opencores.org/projects/sdr_sdram_ctrl|SDR SDRAM Controller]]\\ | ||
| + | [[https://opencores.org/projects/sdram_core|sdram control core]]\\ | ||
| + | [[https://opencores.org/projects/sdram_ctrl|sdram_ctrl]]\\ | ||
| + | [[https://opencores.org/projects/sea|SEAnb]]\\ | ||
| + | [[https://opencores.org/projects/serpent_core|serpent_core]]\\ | ||
| + | [[https://opencores.org/projects/spicc|Simple Interruput Controller Core]]\\ | ||
| + | [[https://opencores.org/projects/simple_uart|simpleUart -]]\\ | ||
| + | [[https://opencores.org/projects/mac|Single cycle multiply accumulate block]]\\ | ||
| + | [[https://opencores.org/projects/slave_vme_bridge|slave vme bridge]]\\ | ||
| + | [[https://opencores.org/projects/smallarm|smallARM]]\\ | ||
| + | [[https://opencores.org/projects/spi-slave|SPI-Slave]]\\ | ||
| + | [[https://opencores.org/projects/sportinterface|SPORT Interface implementation in VHDL for Winbond Micro controller]]\\ | ||
| + | [[https://opencores.org/projects/sts1|STS-1 soft core]]\\ | ||
| + | [[https://opencores.org/projects/synth|Subtractive / Additive Synthesizer]]\\ | ||
| + | [[https://opencores.org/projects/svmac|svmac]]\\ | ||
| + | [[https://opencores.org/projects/systemc_cordic|SystemC CORDIC]]\\ | ||
| + | [[https://opencores.org/projects/motion_controller|thocon]]\\ | ||
| + | [[https://opencores.org/projects/dlp_controller|tindy lattic fpga project for dlp]]\\ | ||
| + | [[https://opencores.org/projects/fmtransmitter|transmitter]]\\ | ||
| + | [[https://opencores.org/projects/digifilter|Trapezoidal Shaper]]\\ | ||
| + | [[https://opencores.org/projects/ultravec|ultravec]]\\ | ||
| + | [[https://opencores.org/projects/verilator|Verilator Verilog to C++/SystemC compiler]]\\ | ||
| + | [[https://opencores.org/projects/rijndael_aes|Verilog Rijndael (AES) Implementation]]\\ | ||
| + | [[https://opencores.org/projects/vhdlmd5|VHDL MD5 Hash Core (Complete)]]\\ | ||
| + | [[https://opencores.org/projects/vhdl_wavefiles|VHDL wavefile package]\\ | ||
| + | [[https://opencores.org/projects/viterbi_decoder_k_7_r_1_2|Viterbi Decoder]]\\ | ||
| + | [[https://opencores.org/projects/viterbi_decoder|Viterbi Decoder]]\\ | ||
| + | [[https://opencores.org/projects/k7_viterbi_decoder|Viterbi Decoder (K=7, G=(171, 133))]]\\ | ||
| + | [[https://opencores.org/projects/smartipphone_si160|VoIP Smart IP Phone SI-160]]\\ | ||
| + | [[https://opencores.org/projects/wb2npi|Wishbone to NPI core]]\\ | ||
| + | [[https://opencores.org/projects/wishbone_checker|wishbone_checker]]\\ | ||
| + | [[https://opencores.org/projects/x25_protocol_interface_project|X.25 interface core]]\\ | ||
| + | [[https://opencores.org/projects/x86soc|x86 Compatible SOC with Video , keyboard , GPIO , uart]] | ||