**这是本文档旧的修订版！**

1. GPSDO: 一个（非常差的）GPS产生的1MHz振荡器
2. CORDIC: 仅使用加法和位移计算SIN和COS
3. HDMI header error correction: HDMI中使用的错误检查和纠正码之一
4. High_performance_FIR: 用于Spartan 6的高性能FIR滤波器
5. DigitalClock: 致力于数字时钟的设计
6. STGL5000: 配置SGTL5000低功耗音频编解码器
7. Combination Lock: Basys-3的四位数组合锁
8. MMCM_reset: 动态重新配置7系列MMCM模块
9. Simple AXI Slave: Zynq ARM CPU的AXI从站
10. myStorm Blackice: 第一个使用开源FPGA工具集的项目
11. TinyTx: 制作一个非常小的串行TX
12. GigabitTX: 从10/100/1000以太网端口发送数据
13. ArtyEthernet: 在Digilent Arty的10/100以太网端口上发送数据
14. Morse: 用Arty传输摩尔斯电码
15. Synchronizer: 正确的同步输入信号的方法
16. MIC and AMP: 将麦克风添加到PMODamp3设计中
17. PMODamp3: 驱动D类I2S功率放大器模块
18. Virtual IO: 使用Vivado调试虚拟IP
19. MPU6050 sensor RTL: 在RTL中直接使用陀螺仪/加速度/姿态传感器
20. Single Step: 一种允许在Spartan 6中切换到单步时钟的方法
21. XADC Fan PWM: 使用7系列XADC控制风扇速度
22. Minimal XADC design: 从Basys3上的on-FPGA ADX读取输入
23. Better rotary encoder input: 我早期尝试正交解码并不是那么好
24. Genesys2 Mandelbrot: Artix-7分形观察器的端口到Genesys2上的Kintex-7
25. DisplayPort: 一个DisplayPort接口
26. HDMI Capture: 捕获HDMI数据并将其发送到串行端口
27. HDMI Processing: 在Artix 7板上进行HDMI视频和音频提取
28. EDID ROM: 视频项目的基本EDID
29. SERDES symbol locking: 如何找到7系列ISERDES的工作bitlip /输入延迟设置
30. Artix 7 1080p passthrough: Passing HDMI signals through the Nexys Video
31. Square root: Calculating the integer square root of a number
32. Artix 7 1080p: Seeing if the Artix-7 can generate 1080p, with a little over-clocking
33. Mandelbrot NG 1080i: A full-HD on the fly Mandelbrot Fractal viewer for the Nexys Video
34. GPS Spew: A desktop GPS jammer
35. OSERDESE2: An example 10:1 serialiser that simulates properly
36. Digital Microphone: Getting data from a PmodMIC3 - A MEM Smicrophone and 12-bit ADC
37. Mandelbrot NG: A new real time Mandelbrot viewer
38. Ring Oscillator: Creating a ring oscillator in an FPGA
39. Digital Sine: Creating relatively accurate analog sine waves with an DAC
40. PmodAD1: Reading an analog joystick with the PmodAD1 (Analog Devices AD7476 ADC)
41. FPGA_ESP8266: Interfacing your FPGA to wifi using low cost ESP8266 module
42. PmodMAXSONAR: Using the serial interface on the PmodMAXSONAR module
43. Minimal HDMI: A super-light-weight 3 bits per pixel true HDMI interface
44. Minimal DVI-D: A super-light-weight 9 bits per pixel DVI-D interface
45. Log Pins: A tiny project to send the start of 11 pins to a host over RS232
46. miniSpartan6+ SPI Programming: Writing your logic design into the board's SPI configuration FLASH
47. miniSpartan6+ DVID Logo: Overlaying the Hamsterworks Logo on a DVI-D stream
48. miniSpartan6+ Audio: Playing beeps
49. miniSpartan6+ DVID Output: A better DVI-D output for the Scarab Hardware miniSpartan6+ board
50. miniSpartan6+ bringup: First bringup of the Scarab Hardware miniSpartan6+ board
51. Stepper: Controlling a small stepper motor
52. Math free digital clock A digital clock that doesn't know how to add!
53. LFSR Divider Using a LFSR to divide a clock signal
54. Sonar Interfacing a low-cost sonar module to an FPGA
55. Simple resets don't work: Showing how not to implement a reset
56. DDS via a VGA port: Analysing how well a VGA port can generate a 6.25 MHz frequency sine wave
57. Inferred FIFO: Implementing a FIFO to avoid using IP
58. Cheap Analogue Input: Reading an analogue joystick without a ADC
59. HDMI Input: Receiving high-speed digital video (DVI-D over HDMI)
60. Intelligent LEDs: Driving Intelligent LEDs
61. SDRAM Audio playback: Playing back extended audio from SDRAM
62. FPGA wheelchair fairy lights: LED lights for my boy's wheelchair

• Accessing the configuration clock: Using the internal oscillator
• High Speed Frequency Counter: Counting the fastest of clocks
• DVI-D Serdes: Creating a DVI-D signal using the OSERDES2 Serializers
• SD card testing: Playing around with the SPI interface on an SD card
• Logic Analyser Test: An 8-bit 200MHz counter to test a Logic Analyser
• Eternity2 Solver: Using an FPGA to solve the Eternity II puzzle
• Zedboard Audio: Using the I2S Audio codec on the Zedboard from VHDL
• Reflow Oven: Solder reflow using an benchtop oven and a FPGA
• FIR Filter: Implementing a FIR filter in an FPGA
• Solid State Relay: Driving a SSR from the a FPGA
• Analog Wing: Using the Papilio Analogue Wing
• Thermocouple demo: Capturing data using a Adafruit Thermocouple interface
• Simple SDRAM Controller: A very simple SDRAM controller
• Zedboard_VGA_HDMI: “Driving the Zedboard's VGA and HDMI interface, at one clock per Pixel, includes RGB444 to YCbCr conversion”
• Zedboard_HDMI_v2: Driving the Zedboard's HDMI interface
• pmodi2s: Driving a Digilent PMODI2S Audio DAC
• pmodenc: Decoding the input from the Digitent PMODENC rotary encoder
• mains_hum_filter: A low-pass DSP filter removing 50Hz hum from an ADC's samples
• a2d_graph: Slowly graphing channel 0 on the LogicStart's ADC
• DSP_Filter_Design: Various bits and bobs for FIR filter design
• I3C2: An Intelligent I2C Controller
• Audio filter: Simulating a passive analogue audio filter
• Dualhead MCB Frame Buffer: Adding a DVI-D output to the MCB Frame Buffer
• MCB Frame Buffer: Creating a 720p frame buffer in the Pipistrello's LPDDR memory
• USB TTL RS232: Using the Papilio as a TTL RS232 adapter
• Spartan 6 1080p: Generating 1080p on a Spartan 6 LX
• High Speed Link: High speed transfer between two FPGAs
• RS232_dumper: Capture then dump data to the RS232 port
• Zedboard_HDMI: Driving the Zedboard's HDMI interface
• Zedboard_OV7670: Attaching a low cost camera to the Zedboard
• Async_VGA: A VGA Controller that works with bursts of data (e.g. from SDRAM)
• FreqSwitch Changing: DCMCLKGEN的输出在运行中以生成不同的频率
• FM_SOS: Send SOS with a simple FM transmitter
• OV7670_camera: Video capture from a cheap camera module
• Digilent EPP Performance: Performance difference in the EPP port speed on digilent boards
• OSERDES2 clocking: Setting up the clocking infrastructure for high speed serial output
• frequency_counter: GPS referenced frequency counter
• hidef_snow: Generate static in 1080p
• config_flash: Storing arbitrary data in the configuration flash
• async_reset: Testing async reset reliability
• meta_test: Testing for metastability
• if vs case: Testing different implementations
• ray_cast: A “ray casting” 3D maze walk through
• dx_display: Driving a Deal Extreme TM1638 7 Seg Display
• Synth: A simple all-digital Synth, in bite sized parts
• Crystal Castles: Reimplementing the old arcade machine on an FPGA
• CheapScope: A simple fabric embedded logic analyser, with and RS232 interface
• dvid_test: Driving a DVI-D interface from a Spartan 6 FPGA
• HDlife: Implementing Conway's Game of Life at full HD
• FPGAheli: Controlling an Infrared Helicopter
• shortwave: A very quick and dirty shortwave transmitter
• AVR8 core: An AVR103 nearly compatible soft core originally from OpenCores
• 10BaseT-TX: Sending out Ethernet packets directly from the FPGA
• SPDIF_Input: Capturing and converting digital audio data from DVD players
• SPDIF_out: Generating digital audio data output
• SPDIF_Volume: A simple digital volume control for a S/PDIF signal - a very simple DSP
• SPDIF_Thru: A passthrough for S/PDIF singal - a base for DSP projects
• VGA Display: Generating the timings for 1440×900 VGA output
• WavePlay: Playing 8bit stereo audio samples from Block RAM
• Mandelbrot: Yet another FPGA Mandelbrot viewer
• DSPfract: Yet another FPGA Mandelbrot viewer - this time using Spartan 6 DSP48A bocks
• Radix2div: Radix 2 division in VHDL
• Radix4div: Radix 4 division in VHDL
• SDRAM Memory Controller: Memory controller for the SDRAM chip on the Terasic DE0-nano
• uClinux: Bringing up uClinux on a Terasic DE0-nano board
• MAF6502: A FPGA implementation of the classic MOS6502 processor
• Papilio Plus/Pacman: Building the Pacman implementation from http://fpgaarcade.com on the Spartan 6 hardware
• Papilio Plus/Fading counter: A softly fading binary counter
• Papilio Plus/PS2 Keyboard: Using the PS/2 keyboard interface
• Papilio Plus/SRAM test 2: writes and verifies test patterns in the SRAM on the Papilio Plus @ 100MHz
• CUGA-1: A CPU Using Gate Arrays