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-A complex programmable logic device (CPLD) is a programmable logic device with complexity between that of PALs and FPGAs, and architectural features of both. The main building block of the CPLD is a macrocell, which contains logic implementing disjunctive normal form expressions and more specialized logic operations.+#### 可编程逻辑器件PLD介绍
  
-====特性==== +-----
-Some of the CPLD features are in common with PALs: +
-  * Non-volatile configuration memory. Unlike many FPGAs, an external configuration ROM isn't required, and the CPLD can function immediately on system start-up. +
-  * For many legacy CPLD devices, routing constrains most logic blocks to have input and output signals connected to external pins, reducing opportunities for internal state storage and deeply layered logic. This is usually not a factor for larger CPLDs and newer CPLD product families.+
  
-Other features are in common with FPGAs: +复杂可编程逻辑器件（CPLD）是一种可编程逻辑器件，其复杂性介于PAL和FPGA之间，并具有两者的架构特性。 ​CPLD的主要组成块是宏单元，它包含实现析取范式表达式和更专业逻辑运算的逻辑。
-  * Large number of gates available. CPLDs typically have the equivalent of thousands to tens of thousands of logic gates, allowing implementation of moderately complicated data processing devices. PALs typically have a few hundred gate equivalents at most, while FPGAs typically range from tens of thousands to several million. +
-  * Some provisions for logic more flexible than sum-of-product expressions,​ including complicated feedback paths between macro cells, and specialized logic for implementing various commonly used functions, such as integer arithmetic. +
-  * The most noticeable difference between a large CPLD and a small FPGA is the presence of on-chip non-volatile memory in the CPLD, which allows CPLDs to be used for "boot loader"​ functions, before handing over control to other devices not having their own permanent program storage. A good example is where a CPLD is used to load configuration data for an FPGA from non-volatile memory.+
  
-====区别==== +\\
-CPLDs were an evolutionary step from even smaller devices that preceded them, PLAs (first shipped by Signetics), and PALs. These in turn were preceded by standard logic products, that offered no programmability and were used to build logic functions by physically wiring several standard logic chips together (usually with wiring on a printed circuit board, but sometimes, especially for prototyping,​ using wire wrap wiring).+
  
-The main distinction between FPGA and CPLD device architectures is that FPGAs are internally based on look-up tables (LUTs) while CPLDs form the logic functions with sea-of-gates (for example, sum of products).+#### 特性
  
-### 参见其它 +CPLD的一些功能特性跟PAL是一致的： 
-#### 语言 +  * 非易失性配置存储器 - 与许多FPGA不同，不需要外部配置ROM，CPLD可以在系统启动时立即运行。 
-  * VHSIC Hardware Description Language ([[VHDL]]) +  * 对于许多传统CPLD器件，布线限制了大多数逻辑模块的输入和输出信号同外部引脚的连接，从而减少了内部状态存储和深度分层逻辑的机会。对于较大的CPLD和较新的CPLD产品系列，这通常不再是一个问题。
-  * Verilog Hardware Description Language +
-  * Standard Test and Programming Language (JAM/STAPL)+
  
-#### 厂商 +其它与FPGA相同的特性： 
-  * [[http://​www.altera.com|Intel/Altera]] +  * 提供大量门。 CPLD通常具有相当于数千到数万个逻辑门，允许实现中等复杂度的数据处理设备。而PAL通常最多只有几百个门的规模，而FPGA通常从几万到几百万不等。 
-  * [[http://www.atmel.com|Atmel]] +  * 逻辑的一些规定比“产品加”表达式更灵活，包括宏单元之间复杂的反馈路径，以及用于实现各种常用功能的专用逻辑，例如整数运算。 
-  * [[http://​www.cypress.com|Cypress Semiconductor]] +  * 大型CPLD和小型FPGA之间最显着的区别是CPLD中存在片上非易失性存储器，允许CPLD用于“引导加载程序”功能，然后将控制权移交给那些自己没有永久程序存储的设备。 一个很好的例子是CPLD被用于从非易失性存储器加载FPGA的配置数据。 
-  * [[http://​www.latticesemi.com|Lattice Semiconductor]] + 
-  * [Xilinx](http://​www.xilinx.com)+\\ 
 + 
 +#### 区别 
 + 
 +CPLD是从它们之前的更小型设备 - PLAs（首次由Signetics出货）和PAL演进而来的，在PLAs和PAL之前则是标准的逻辑产品，它们不提供可编程性，只能通过将几个标准逻辑芯片物理地连接在一起（通常在印刷电路板上布线，但有时特别是用于原型设计，使用绕线布线）来构建逻辑功能）。 
 + 
 +FPGA和CPLD器件架构之间的主要区别在于FPGA内部是基于查找表（LUT），而CPLD构成具有栅极门的逻辑功能（例如，产品总和）。 
 + 
 +\\ 
 + 
 +#### 编程语言 
 +  * VHDL - VHSIC硬件描述语言 
 +  * Verilog硬件描述语言 
 +  * JAM/STAPL - 标准测试和编程语言 
 + 
 +\\ 
 + 
 +#### 主要厂商 
 +  * [Intel/​Altera](http://​www.altera.com)，Altera被Intel收购，成为其一个部门 
 +  * [Microchip](http://www.microchip.com), 收购了Microsemi 
 +  * [[http://​www.cypress.com|Cypress Semiconductor]]，擅长的技术为可编程SoC（PSoC） 
 +  * [[http://​www.latticesemi.com|Lattice Semiconductor]]，全球第三大的FPGA厂商 
 +  * [Xilinx](http://​www.xilinx.com)，Altera被Intel收购以后，目前为行业里最强大的FPGA厂商 
 + 
 +\\
  
 #### 技术 #### 技术
   * 专用集成电路([[ASIC]])   * 专用集成电路([[ASIC]])
-  * 可擦除可编程逻辑器件([[EPLD]]) +  * 可擦除可编程逻辑器件(EPLD) 
-  * 简单可编程逻辑器件([[SPLD]]) +  * 简单可编程逻辑器件(SPLD) 
-  * Macrocell array +  * 宏单元阵列(Macrocell array) 
-  * 可编程阵列逻辑([[PAL]]) +  * 可编程阵列逻辑(PAL) 
-  * 可编程逻辑阵列([[PLA]]) +  * 可编程逻辑阵列(PLA) 
-  * 可编程逻辑器件([[PLD]]) +  * 可编程逻辑器件(PLD) 
-  * 通用阵列逻辑([[GAL]])+  * 通用阵列逻辑(GAL)
   * 可编程电可擦除逻辑(PEEL)   * 可编程电可擦除逻辑(PEEL)
   * 现场可编程门阵列([[FPGA]])   * 现场可编程门阵列([[FPGA]])
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