Synthesis and Ngdbuild Report synthesis: version Diamond (64-bit) 3.8.0.115.3 Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved. Copyright (c) 1995 AT&T Corp. All rights reserved. Copyright (c) 1995-2001 Lucent Technologies Inc. All rights reserved. Copyright (c) 2001 Agere Systems All rights reserved. Copyright (c) 2002-2016 Lattice Semiconductor Corporation, All rights reserved. Mon Dec 18 08:37:05 2017 Command Line: synthesis -f i2c_master_i2c_master_lattice.synproj -gui -msgset C:/Users/22822/Desktop/2/source/i2c_master_PCF8591_ADC/promote.xml Synthesis options: The -a option is MachXO2. The -s option is 4. The -t option is CSBGA132. The -d option is LCMXO2-4000HC. Using package CSBGA132. Using performance grade 4. ########################################################## ### Lattice Family : MachXO2 ### Device : LCMXO2-4000HC ### Package : CSBGA132 ### Speed : 4 ########################################################## Optimization goal = Balanced Top-level module name = i2c_master. Target frequency = 1.000000 MHz. Maximum fanout = 1000. Timing path count = 3 BRAM utilization = 100.000000 % DSP usage = true DSP utilization = 100.000000 % fsm_encoding_style = auto resolve_mixed_drivers = 0 fix_gated_clocks = 1 Mux style = Auto Use Carry Chain = true carry_chain_length = 0 Loop Limit = 1950. Use IO Insertion = TRUE Use IO Reg = AUTO Resource Sharing = TRUE Propagate Constants = TRUE Remove Duplicate Registers = TRUE force_gsr = auto ROM style = auto RAM style = auto The -comp option is FALSE. The -syn option is FALSE. -p C:/Users/22822/Desktop/2/source/i2c_master_PCF8591_ADC (searchpath added) -p E:/lscc/diamond/3.8_x64/ispfpga/xo2c00/data (searchpath added) -p C:/Users/22822/Desktop/2/source/i2c_master_PCF8591_ADC/i2c_master (searchpath added) -p C:/Users/22822/Desktop/2/source/i2c_master_PCF8591_ADC (searchpath added) Verilog design file = C:/Users/22822/Desktop/2/source/i2c_master_PCF8591_ADC/clk_div.v Verilog design file = C:/Users/22822/Desktop/2/source/i2c_master_PCF8591_ADC/i2c_master.v Verilog design file = C:/Users/22822/Desktop/2/source/i2c_master_PCF8591_ADC/i2c_master_config.v Verilog design file = C:/Users/22822/Desktop/2/source/i2c_master_PCF8591_ADC/i2c_master_logic.v NGD file = i2c_master_i2c_master.ngd -sdc option: SDC file input not used. -lpf option: Output file option is ON. Hardtimer checking is enabled (default). The -dt option is not used. The -r option is OFF. [ Remove LOC Properties is OFF. ] Technology check ok... Analyzing Verilog file E:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v. VERI-1482 Compile design. Compile Design Begin Analyzing Verilog file c:/users/22822/desktop/2/source/i2c_master_pcf8591_adc/clk_div.v. VERI-1482 Analyzing Verilog file c:/users/22822/desktop/2/source/i2c_master_pcf8591_adc/i2c_master.v. VERI-1482 Analyzing Verilog file c:/users/22822/desktop/2/source/i2c_master_pcf8591_adc/i2c_master_config.v. VERI-1482 Analyzing Verilog file c:/users/22822/desktop/2/source/i2c_master_pcf8591_adc/i2c_master_logic.v. VERI-1482 Analyzing Verilog file E:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/machxo2.v. VERI-1482 Top module name (Verilog): i2c_master INFO - synthesis: c:/users/22822/desktop/2/source/i2c_master_pcf8591_adc/i2c_master.v(2): compiling module i2c_master. VERI-1018 INFO - synthesis: c:/users/22822/desktop/2/source/i2c_master_pcf8591_adc/clk_div.v(18): compiling module clk_div. VERI-1018 INFO - synthesis: c:/users/22822/desktop/2/source/i2c_master_pcf8591_adc/i2c_master_config.v(1): compiling module i2c_master_config. VERI-1018 INFO - synthesis: c:/users/22822/desktop/2/source/i2c_master_pcf8591_adc/i2c_master_logic.v(1): compiling module i2c_master_logic. VERI-1018 Loading NGL library 'E:/lscc/diamond/3.8_x64/ispfpga/xo2c00a/data/xo2alib.ngl'... Loading NGL library 'E:/lscc/diamond/3.8_x64/ispfpga/xo2c00/data/xo2clib.ngl'... Loading NGL library 'E:/lscc/diamond/3.8_x64/ispfpga/mg5g00/data/mg5glib.ngl'... Loading NGL library 'E:/lscc/diamond/3.8_x64/ispfpga/or5g00/data/orc5glib.ngl'... Loading device for application map from file 'xo2c4000.nph' in environment: E:/lscc/diamond/3.8_x64/ispfpga. Package Status: Final Version 1.44. Top-level module name = i2c_master. WARNING - synthesis: c:/users/22822/desktop/2/source/i2c_master_pcf8591_adc/i2c_master_config.v(69): Register \i2c_master_config_inst/i2c_state_i0 is stuck at Zero. VDB-5013 WARNING - synthesis: Bit 0 of Register \i2c_master_config_inst/i2c_master_logic_inst/i2c_ack is stuck at Zero WARNING - synthesis: Bit 1 of Register \i2c_master_config_inst/i2c_master_logic_inst/i2c_ack is stuck at Zero WARNING - synthesis: Bit 0 of Register \i2c_master_config_inst/i2c_config is stuck at Zero WARNING - synthesis: Bit 1 of Register \i2c_master_config_inst/i2c_config is stuck at Zero WARNING - synthesis: Bit 2 of Register \i2c_master_config_inst/i2c_config is stuck at Zero WARNING - synthesis: Bit 3 of Register \i2c_master_config_inst/i2c_config is stuck at Zero WARNING - synthesis: Bit 4 of Register \i2c_master_config_inst/i2c_config is stuck at Zero WARNING - synthesis: Bit 6 of Register \i2c_master_config_inst/i2c_config is stuck at Zero WARNING - synthesis: Bit 1 of Register \i2c_master_config_inst/i2c_dev_addr is stuck at Zero WARNING - synthesis: Bit 2 of Register \i2c_master_config_inst/i2c_dev_addr is stuck at Zero WARNING - synthesis: Bit 4 of Register \i2c_master_config_inst/i2c_dev_addr is stuck at Zero WARNING - synthesis: Bit 5 of Register \i2c_master_config_inst/i2c_dev_addr is stuck at Zero WARNING - synthesis: Bit 6 of Register \i2c_master_config_inst/i2c_dev_addr is stuck at Zero WARNING - synthesis: Bit 0 of Register \i2c_master_config_inst/i2c_reg_addr is stuck at Zero WARNING - synthesis: Bit 1 of Register \i2c_master_config_inst/i2c_reg_addr is stuck at Zero WARNING - synthesis: Bit 2 of Register \i2c_master_config_inst/i2c_reg_addr is stuck at Zero WARNING - synthesis: Bit 3 of Register \i2c_master_config_inst/i2c_reg_addr is stuck at Zero WARNING - synthesis: Bit 4 of Register \i2c_master_config_inst/i2c_reg_addr is stuck at Zero WARNING - synthesis: Bit 5 of Register \i2c_master_config_inst/i2c_reg_addr is stuck at Zero WARNING - synthesis: Bit 6 of Register \i2c_master_config_inst/i2c_reg_addr is stuck at Zero WARNING - synthesis: Bit 7 of Register \i2c_master_config_inst/i2c_reg_addr is stuck at Zero Removed duplicate sequential element \i2c_master_config_inst/i2c_dev_addr(1 bit), because it is equivalent to \i2c_master_config_inst/i2c_config WARNING - synthesis: Bit 0 of Register \i2c_master_config_inst/i2c_master_logic_inst/state_current_ is stuck at Zero WARNING - synthesis: c:/users/22822/desktop/2/source/i2c_master_pcf8591_adc/i2c_master_config.v(90): Register \i2c_master_config_inst/i2c_reg_data_i7 is stuck at Zero. VDB-5013 WARNING - synthesis: c:/users/22822/desktop/2/source/i2c_master_pcf8591_adc/i2c_master_logic.v(93): Register \i2c_master_config_inst/i2c_master_logic_inst/state_current__i12 is stuck at Zero. VDB-5013 WARNING - synthesis: c:/users/22822/desktop/2/source/i2c_master_pcf8591_adc/i2c_master_logic.v(685): Register \i2c_master_config_inst/i2c_master_logic_inst/i2c_ack__i6 is stuck at Zero. VDB-5013 WARNING - synthesis: c:/users/22822/desktop/2/source/i2c_master_pcf8591_adc/i2c_master_logic.v(586): Register \i2c_master_config_inst/i2c_master_logic_inst/cnt_s_nack_i0_i2 is stuck at Zero. VDB-5013 WARNING - synthesis: c:/users/22822/desktop/2/source/i2c_master_pcf8591_adc/i2c_master_logic.v(431): Register \i2c_master_config_inst/i2c_master_logic_inst/cnt_write_reg_data_1106__i3 is stuck at Zero. VDB-5013 GSR instance connected to net rst_n_c. WARNING - synthesis: Initial value found on instance \i2c_master_config_inst/i2c_master_logic_inst/sda_ctl_511 will be ignored. Applying 1.000000 MHz constraint to all clocks WARNING - synthesis: No user .sdc file. Results of NGD DRC are available in i2c_master_drc.log. Loading NGL library 'E:/lscc/diamond/3.8_x64/ispfpga/xo2c00a/data/xo2alib.ngl'... Loading NGL library 'E:/lscc/diamond/3.8_x64/ispfpga/xo2c00/data/xo2clib.ngl'... Loading NGL library 'E:/lscc/diamond/3.8_x64/ispfpga/mg5g00/data/mg5glib.ngl'... Loading NGL library 'E:/lscc/diamond/3.8_x64/ispfpga/or5g00/data/orc5glib.ngl'... All blocks are expanded and NGD expansion is successful. Writing NGD file i2c_master_i2c_master.ngd. ################### Begin Area Report (i2c_master)###################### Number of register bits => 89 of 4635 (1 % ) BB => 1 CCU2D => 32 FD1P3AY => 3 FD1P3IX => 37 FD1S3AX => 2 FD1S3IX => 47 GSR => 1 IB => 2 LUT4 => 244 OB => 9 PFUMX => 9 ################### End Area Report ################## ################### Begin BlackBox Report ###################### TSALL => 1 ################### End BlackBox Report ################## ################### Begin Clock Report ###################### Clock Nets Number of Clocks: 2 Net : clk_div_inst/clk_div_100k, loads : 56 Net : sys_clk_12m_c, loads : 34 Clock Enable Nets Number of Clock Enables: 13 Top 10 highest fanout Clock Enables: Net : i2c_master_config_inst/i2c_master_logic_inst/clk_div_100k_enable_36, loads : 8 Net : i2c_master_config_inst/i2c_master_logic_inst/clk_div_100k_enable_25, loads : 4 Net : i2c_master_config_inst/i2c_master_logic_inst/clk_div_100k_enable_37, loads : 4 Net : i2c_master_config_inst/i2c_master_logic_inst/clk_div_100k_enable_24, loads : 4 Net : i2c_master_config_inst/i2c_master_logic_inst/clk_div_100k_enable_35, loads : 4 Net : i2c_master_config_inst/i2c_master_logic_inst/clk_div_100k_enable_40, loads : 4 Net : i2c_master_config_inst/i2c_master_logic_inst/clk_div_100k_enable_18, loads : 3 Net : i2c_master_config_inst/i2c_master_logic_inst/clk_div_100k_enable_7, loads : 3 Net : i2c_master_config_inst/i2c_master_logic_inst/clk_div_100k_enable_20, loads : 3 Net : i2c_master_config_inst/i2c_master_logic_inst/clk_div_100k_enable_22, loads : 3 Highest fanout non-clock nets Top 10 highest fanout non-clock nets: Net : i2c_master_config_inst/i2c_master_logic_inst/state_current_0, loads : 35 Net : clk_div_inst/n4591, loads : 32 Net : i2c_master_config_inst/i2c_master_logic_inst/state_current_2, loads : 25 Net : i2c_master_config_inst/i2c_master_logic_inst/n7838, loads : 23 Net : i2c_master_config_inst/i2c_master_logic_inst/state_current_9, loads : 22 Net : i2c_master_config_inst/i2c_master_logic_inst/n7844, loads : 21 Net : i2c_master_config_inst/i2c_master_logic_inst/state_current_4, loads : 18 Net : i2c_master_config_inst/i2c_master_logic_inst/state_current_1, loads : 18 Net : i2c_master_config_inst/i2c_master_logic_inst/state_current_8, loads : 17 Net : i2c_master_config_inst/i2c_master_logic_inst/state_current_7, loads : 16 ################### End Clock Report ################## Timing Report Summary -------------- -------------------------------------------------------------------------------- Constraint | Constraint| Actual|Levels -------------------------------------------------------------------------------- | | | create_clock -period 1000.000000 -name | | | clk1 [get_nets sys_clk_12m_c] | 1.000 MHz| 98.164 MHz| 6 | | | create_clock -period 1000.000000 -name | | | clk0 [get_nets clk_div_100k] | 1.000 MHz| 62.539 MHz| 10 | | | -------------------------------------------------------------------------------- All constraints were met. Peak Memory Usage: 68.645 MB -------------------------------------------------------------- Elapsed CPU time for LSE flow : 2.875 secs --------------------------------------------------------------