###Uncategorized

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####项目
[[https://opencores.org/projects/dc97|AC97 Controller]]\\
[[https://opencores.org/projects/ahb_arbiter|AHB ARBITER]]\\
[[https://opencores.org/projects/alu_with_selectable_inputs_and_outputs|ALU with selectable inputs and outputs]]\\
[[https://opencores.org/projects/brisc|BRISC microprocessor]]\\
[[https://opencores.org/projects/cereon|Cereon]]\\
[[https://opencores.org/projects/claw|CLAW: A two way multithreaded (8 threads) VLIW Processor]]\\
[[https://opencores.org/projects/dallas_one-wire|Dallas one-wire protocol with a DS1821 top level demo]]\\
[[https://opencores.org/projects/nemo_emotion|eMotion NEMO Implementation]]\\
[[https://opencores.org/projects/aes128|FastAES]]\\
[[https://opencores.org/projects/fft_32|fft_32]]\\
[[https://opencores.org/projects/firgen|FIR-Gen]]\\
[[https://opencores.org/projects/cordic_engine|Fix-Point Cordic Engine]]\\
[[https://opencores.org/projects/floating_point_adder_subtractor|floating point adder/subtractor]]\\
[[https://opencores.org/projects/sbd_sqrt_fp|Floating Point Square Root]]\\
[[https://opencores.org/projects/floppyif|Floppy Drive Controller]]\\
[[https://opencores.org/projects/power_inverter|FPGA Based PWM Inverter]]\\
[[https://opencores.org/projects/fsl2serial|FSL 2 Serial Peripheral]]\\
[[https://opencores.org/projects/functiongenerator|Function Generator]]\\
[[https://opencores.org/projects/gcpu|GCPU]]\\
[[https://opencores.org/projects/adder|High speed adder for large bit size computation]]\\
[[https://opencores.org/projects/i2c_slave|I2C slave for data transfer]]\\
[[https://opencores.org/projects/intel8031|intel 8031]]\\
[[https://opencores.org/projects/djpeg|JPEG Decoder]]\\
[[https://opencores.org/projects/kcpsm3_interrupt_handling|KCPSM3 Maskable Interrupt]]\\
[[https://opencores.org/projects/ldpc|ldpc]]\\
[[https://opencores.org/projects/uart_serial|Light Uart]]\\
[[https://opencores.org/projects/lpc|LPC(Low Pin Count) controller and peripherals]]\\
[[https://opencores.org/projects/lwmips|LWMIPS]]\\
[[https://opencores.org/projects/macroblock_motion_detection|Macroblock Motion Detection]]\\
[[https://opencores.org/projects/manchesterencoderdecoder|Manchester Encoder / Decoder]]\\
[[https://opencores.org/projects/matrixdetermprocessor|Matrix Determinant Processor]]\\
[[https://opencores.org/projects/mcu|mcu]]\\
[[https://opencores.org/projects/md5|MD5 Hash Core RFC 1321]]\\
[[https://opencores.org/projects/milstd1553bbusprotocol|mil std 1553b]]\\
[[https://opencores.org/projects/mini-acex1k|Mini-ACEX1K]]\\
[[https://opencores.org/projects/processor|mips single cycle microprocessor]]\\
[[https://opencores.org/projects/mpeg4_video_coding|MPEG-4 Video Coding]]\\
[[https://opencores.org/projects/fftprocessor|Multiplierless 64 point FFT Processor]]\\
[[https://opencores.org/projects/neot|NeoT]]\\
[[https://opencores.org/projects/design_dsp320tmsc10_with_vhdl|ngocminh]]\\
[[https://opencores.org/projects/nonrestoringsquareroot|nonrestoringsquareroot]]\\
[[https://opencores.org/projects/ppcnorthbridge|NorthBridge (PPC)]]\\
[[https://opencores.org/projects/ntsc_vid_encoder|ntsc video encoder]]\\
[[https://opencores.org/projects/ocmips|ocmips]]\\
[[https://opencores.org/projects/omega|Omega CPU - Alpha like clone]]\\
[[https://opencores.org/projects/opb_ps2_keyboard_controller|OPB-compatible PS/2 Keyboard Controller]]\\
[[https://opencores.org/projects/opb_udp_transceiver|OPB-compatible UDP transceiver]]\\
[[https://opencores.org/projects/open_1394_intellectual_property|open 1394 intellectual property]]\\
[[https://opencores.org/projects/opencpu678085|openCPU 67-80-85]]\\
[[https://opencores.org/projects/opentech|OpenTech Cd-rom]]\\
[[https://opencores.org/projects/wpf|Packet Filter]]\\
[[https://opencores.org/projects/pci_ide_controller|PCI to IDE Controller core]]\\
[[https://opencores.org/projects/performance_counter|Performance counter for Microblaze]]\\
[[https://opencores.org/projects/pipelined_dct|Pipelined 8-point DCT]]\\
[[https://opencores.org/projects/phoenix_controller|pnctl]]\\
[[https://opencores.org/projects/profibus_dp|Profibus]]\\
[[https://opencores.org/projects/programmabledct|Programmable DCT Accelarator with 16 bit Microcontroller]]\\
[[https://opencores.org/projects/radiohdl|RadioHDL]]\\
[[https://opencores.org/projects/rc5_decoder|rc5]]\\
[[https://opencores.org/projects/project|RISC CPU (DLX) in SystemC]]\\
[[https://opencores.org/projects/scsi_interface|SCSI Interface]]\\
[[https://opencores.org/projects/sdr_sdram_ctrl|SDR SDRAM Controller]]\\
[[https://opencores.org/projects/sdram_core|sdram control core]]\\
[[https://opencores.org/projects/sdram_ctrl|sdram_ctrl]]\\
[[https://opencores.org/projects/sea|SEAnb]]\\
[[https://opencores.org/projects/serpent_core|serpent_core]]\\
[[https://opencores.org/projects/spicc|Simple Interruput Controller Core]]\\
[[https://opencores.org/projects/simple_uart|simpleUart -]]\\
[[https://opencores.org/projects/mac|Single cycle multiply accumulate block]]\\
[[https://opencores.org/projects/slave_vme_bridge|slave vme bridge]]\\
[[https://opencores.org/projects/smallarm|smallARM]]\\
[[https://opencores.org/projects/spi-slave|SPI-Slave]]\\
[[https://opencores.org/projects/sportinterface|SPORT Interface implementation in VHDL for Winbond Micro controller]]\\
[[https://opencores.org/projects/sts1|STS-1 soft core]]\\
[[https://opencores.org/projects/synth|Subtractive / Additive Synthesizer]]\\
[[https://opencores.org/projects/svmac|svmac]]\\
[[https://opencores.org/projects/systemc_cordic|SystemC CORDIC]]\\
[[https://opencores.org/projects/motion_controller|thocon]]\\
[[https://opencores.org/projects/dlp_controller|tindy lattic fpga project for dlp]]\\
[[https://opencores.org/projects/fmtransmitter|transmitter]]\\
[[https://opencores.org/projects/digifilter|Trapezoidal Shaper]]\\
[[https://opencores.org/projects/ultravec|ultravec]]\\
[[https://opencores.org/projects/verilator|Verilator Verilog to C++/SystemC compiler]]\\
[[https://opencores.org/projects/rijndael_aes|Verilog Rijndael (AES) Implementation]]\\
[[https://opencores.org/projects/vhdlmd5|VHDL MD5 Hash Core (Complete)]]\\
[[https://opencores.org/projects/vhdl_wavefiles|VHDL wavefile package]\\
[[https://opencores.org/projects/viterbi_decoder_k_7_r_1_2|Viterbi Decoder]]\\
[[https://opencores.org/projects/viterbi_decoder|Viterbi Decoder]]\\
[[https://opencores.org/projects/k7_viterbi_decoder|Viterbi Decoder (K=7, G=(171, 133))]]\\
[[https://opencores.org/projects/smartipphone_si160|VoIP Smart IP Phone SI-160]]\\
[[https://opencores.org/projects/wb2npi|Wishbone to NPI core]]\\
[[https://opencores.org/projects/wishbone_checker|wishbone_checker]]\\
[[https://opencores.org/projects/x25_protocol_interface_project|X.25 interface core]]\\
[[https://opencores.org/projects/x86soc|x86 Compatible SOC with Video , keyboard , GPIO , uart]]