### Arithmetic core
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#### 项目
[[https://opencores.org/projects/audio|1 bit adpcm codec]]\\
[[https://opencores.org/projects/two_dimensional_fast_hartley_transform|2D FHT]]\\
[[https://opencores.org/projects/4-bit-system|4-bit system]]\\
[[https://opencores.org/projects/fast-crc|5x4Gbps CRC generator designed with standard cells]]\\
[[https://opencores.org/projects/8bit_vedic_multiplier|8 bit Vedic Multiplier]]\\
[[https://opencores.org/projects/astron_adder|Adder library]]\\
[[https://opencores.org/projects/apbtoaes128|AES128]]\\
[[https://opencores.org/projects/artificial_neural_network|ANN]]\\
[[https://opencores.org/projects/fast_antilog|Anti-Logarithm (square-root), base-2, single-cycle]]\\
[[https://opencores.org/projects/bcd_adder|BCD adder]]\\
[[https://opencores.org/projects/binary_to_bcd|Binary to BCD conversions, with LED display driver]]\\
[[https://opencores.org/projects/bluespec-reedsolomon|Bluespec SystemVerilog Reed Solomon Decoder]]\\
[[https://opencores.org/projects/mult_booth_array|Booth Array Multiplier]]\\
[[https://opencores.org/projects/cavlc|cavlc decoder]]\\
[[https://opencores.org/projects/ca_prng|Cellular Automata PRNG]]\\
[[https://opencores.org/projects/cf_cordic|CF Cordic]]\\
[[https://opencores.org/projects/cf_fft|CF FFT]]\\
[[https://opencores.org/projects/cf_fp_mul|CF Floating Point Multiplier]]\\
[[https://opencores.org/projects/complexarithmetic|Complex Arithmetic Operations]]\\
[[https://opencores.org/projects/complex-gaussian-pseudo-random-number-generator|Complex Gaussian Pseudo-random Number Generator]]\\
[[https://opencores.org/projects/complexmultiplier|Complex Multiplier]]\\
[[https://opencores.org/projects/complexise|Complex Operations ISE for NIOS II]]\\
[[https://opencores.org/projects/verilog_cordic_core|configurable cordic core in verilog]]\\
[[https://opencores.org/projects/configurable_crc_core|configurable CRC core]]\\
[[https://opencores.org/projects/parallel_scrambler|Configurable Parallel Scrambler]]\\
[[https://opencores.org/projects/cordic_atan_iq|CORDIC arctangent for IQ signals]]\\

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[[https://opencores.org/projects/cordic|CORDIC core]]\\
[[https://opencores.org/projects/crcahb|CRCAHB]]\\
[[https://opencores.org/projects/cr_div|cr_div - Cached Reciprocal Divider]]\\
[[https://opencores.org/projects/dct|DCT - Discrete Cosine Transformer]]\\
[[https://opencores.org/projects/mdct|Discrete Cosine Transform core]]\\
[[https://opencores.org/projects/double_fpu|double_fpu_verilog]]\\
[[https://opencores.org/projects/dvb_s2_ldpc_decoder|DVB-S2 LDPC Decoder]]\\

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[[https://opencores.org/projects/ecg|Elliptic Curve Group]]\\
[[https://opencores.org/projects/fixed_point_arithmetic_parameterized|Fixed Point Arithmetic Modules]]\\
[[https://opencores.org/projects/verilog_fixed_point_math_library|Fixed Point Math Library for Verilog]]\\
[[https://opencores.org/projects/fixed-point-sqrt|Fixed Point Square Root (Recursive Algorithm)]]\\
[[https://opencores.org/projects/quadratic_func|Fixed-point quadratic polynomial]]\\
[[https://opencores.org/projects/fpuvhdl|Floating Point Adder and Multiplier]]\\
[[https://opencores.org/projects/fp_log|Floating-Point Logarithm Unit]]\\
[[https://opencores.org/projects/fpga-median|FPGA-based Median Filter]]\\
[[https://opencores.org/projects/fpu100|FPU]]\\
[[https://opencores.org/projects/fpu_double|FPU Double VHDL]]\\
[[https://opencores.org/projects/ft816float|FT816Float - Floating point accelerator]]\\
[[https://opencores.org/projects/gng|Gaussian Noise Generator]]\\
[[https://opencores.org/projects/generic_booth_multipler|Generic Booth Multiplier]]\\
[[https://opencores.org/projects/galois_lfsr|Generic Galois LFSR]]\\
[[https://opencores.org/projects/myhdl_lfsr|Generic LFSR Generator]]\\
[[https://opencores.org/projects/gnextrapolator|GNExtrapolator]]\\
[[https://opencores.org/projects/divider|Hardware Division Units]]\\
[[https://opencores.org/projects/dpll-isdn|Hardware implementation of Binary Fully Digital Phase Locked Loop]]\\
[[https://opencores.org/projects/loadbalancer|Hardware Load Balancer for Multi-Stage Software Router]]\\
[[https://opencores.org/projects/hcsa_adder|HCSA adder and Generic ALU based on HCSA]]\\
[[https://opencores.org/projects/heap_sorter|Heap sorter for FPGA]]\\
[[https://opencores.org/projects/hierarch_unit|HIERARCHICAL Integer Multiplier unit]]\\
[[https://opencores.org/projects/huffmandecoder|Huffman Decoder]]\\
[[https://opencores.org/projects/lcd162b_behavior|LCD162B Behavior Model]]\\
[[https://opencores.org/projects/lfsr_randgen|LFSR-Random number generator]]\\
[[https://opencores.org/projects/fast_log|Logarithm function, base-2, single-cycle]]\\
[[https://opencores.org/projects/lzrw1-compressor-core|LZRW1 Compressor Core]]\\
[[https://opencores.org/projects/parallel_search_for_maximum_weight|Maximum/Minimum binary tree finder]]\\
[[https://opencores.org/projects/mesi_isc|MESI Coherency InterSection Controller]]\\
[[https://opencores.org/projects/mod3_calc|mod3_calc]]\\
[[https://opencores.org/projects/modbus|MODBUS Implementation in VHDL]]\\
[[https://opencores.org/projects/mhcqcm|Model of hybrid classical-quantum computing method]]\\
[[https://opencores.org/projects/astron_multiplier|Multiplier library]]\\
[[https://opencores.org/projects/multiply-accumulate|Multiply-Accumulate Operation (MAC)]]\\
[[https://opencores.org/projects/nlprg|Non Linear Pseudo Random Generator]]\\
[[https://opencores.org/projects/numbert_sort_device|Numbert sort device O(N)]]\\
[[https://opencores.org/projects/openfpu64|openFPU64]]\\
[[https://opencores.org/projects/adder_tree|Parameterizable adder tree]]\\
[[https://opencores.org/projects/isqrt_dbd|Parameterizable integer square root by the digit-by-digit method]]\\
[[https://opencores.org/projects/versatile_fft|Parametrized FFT engine]]\\
[[https://opencores.org/projects/pid_controler|PID Controler]]\\
[[https://opencores.org/projects/vhdl-pipeline-mips|pipeline mips in vhdl]]\\
[[https://opencores.org/projects/popcount_gen|Population Counter Generator]]\\
[[https://opencores.org/projects/priority_encoder|Priority Encoder]]\\
[[https://opencores.org/projects/pyramid_unit|PYRAMID Integer Multiplier unit]]\\
[[https://opencores.org/projects/qfp32|QuadFixedPoint32 Arithmetic Unit]]\\
[[https://opencores.org/projects/cfft|radix 4 complex fft]]\\
[[https://opencores.org/projects/raytrac|Ray Tracing Arithmetic Engine]]\\
[[https://opencores.org/projects/rhp|Reconfigurable Hardware Platform]]\\
[[https://opencores.org/projects/reedsolomon|Reed-Solomon Decoder]]\\
[[https://opencores.org/projects/astron_requantizer|Requantizer]]\\
[[https://opencores.org/projects/signed_unsigned_multiplier_and_divider|Signed / unsigned multiplier and divider with prime number generator as test circuit]]\\
[[https://opencores.org/projects/signed_integer_divider|Signed integer divider]]\\
[[https://opencores.org/projects/sincos|SineAndCosineTable]]\\
[[https://opencores.org/projects/single-14-segment-display-driver-w-decoder|Single 14 Segment Display Driver with Limited ASCII Decoder]]\\
[[https://opencores.org/projects/single_clock_divider|Single Clock Unsigned Division Algorithm]]\\
[[https://opencores.org/projects/special_functions_unit|Special Functions Units (SFU)]]\\
[[https://opencores.org/projects/superscalar_dlx|Superscalar Version Of DLX]]\\
[[https://opencores.org/projects/suslik|suslik scalar risc cpu]]\\
[[https://opencores.org/projects/tanhapprox|Tanh Approximation Custom Instruction for NIOS II]]\\

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[[https://opencores.org/projects/pairing|Tate Bilinear Pairing]]\\
[[https://opencores.org/projects/ternary_adder|Ternary (3-input) Adder]]\\

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[[https://opencores.org/projects/tiny_tate_bilinear_pairing|Tiny Tate Bilinear Pairing]]\\
[[https://opencores.org/projects/trigonometric_functions_in_double_fpu|trigonometric functions (degrees) in double fpu]]\\
[[https://opencores.org/projects/matrix3x3|True matrix 3x3 multiplier]]\\
[[https://opencores.org/projects/kvcordic|Universal multi-function CORDIC]]\\
[[https://opencores.org/projects/serial_div_uu|Unsigned serial divider]]\\
[[https://opencores.org/projects/versatile_counter|Versatile counter]]\\
[[https://opencores.org/projects/vhcg|Viterbi HDL Code Generator]]\\
[[https://opencores.org/projects/viterb_encoder_and_decoder|VIterbi_Tx_Rx]]\\
[[https://opencores.org/projects/xilinx_virtex_fp_library|Xilinx Virtex FLoating Point]]\\
[[https://opencores.org/projects/yac|YAC - Yet Another CORDIC Core]]\\
[[https://opencores.org/projects/128prng|[128bit] Pseudo Random Number Generator Using Linear-feedback Shift Registers]]\\