在RISC-V软核上运行Linux的FPGA开发板 - OrangeCrab
这是一款基于Lattice的ECP5 FPGA设计的开发板,能够移植RISC-V软核,并可以运行Linux
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KiCad
嵌入式系统
RISC-V
FPGA
Linux
ECP5
bullsear
更新2023-10-10
1185

这是一款基于Lattice的ECP5 FPGA设计的开发板,能够移植RISC-V软核,并可以运行Linux。

硬件资源
  • Lattice ECP5-25F FPGA in csfBGA285 package (-8 speed grade) (Part # LFE5U-25F-8MG285C)
    • 24 K - Look Up Tables
    • 1008 Kb - Embedded Block RAM
    • 194 Kb - Distributed RAM
    • 28 - 18x18 Multipliers
    • PLLs: 2
    • Internal oscillator
    • Flexible I/O for DDR3 Memory Support
  • DDR3L Memory
    • 128 Mbytes (1Gbit)
    • 64M x16
    • 1.35V low voltage operation
  • Micro USB connection
    • Full-speed (12Mbit) USB with a direct connection to the FPGA
  • Non-volatile Storage
    • 128Mbit QSPI FLASH Memory
    • Bootloader (First 4Mbits)
    • User Bitstream
    • User storage (Firmware/MSC backend/etc)
    • QSPI compatible
  • MicroSD socket
    • 4bit SD interface (CK, CMD, DAT0-3)
  • Power supply
    • High efficiency DCDC for main supplies
    • Battery charger (100mA), with a charge indicator LED
    • LiPo battery connector (PH type)
  • 48MHz onboard oscillator
  • Standard 0.05" JTAG connector
  • User I/O
    • 1x Button
    • 1x RGB LED
    • 20x I/O on 0.1" headers
  • Analog System
    • Analog Mux
    • SAR ADC, external RC / input comparator of FPGA
    • Digital bypass
    • Internal channels for supply monitor
    • Battery voltage sensing
  • Feather Format Board
    • Dimensions: 22.86mm x 50.8mm (0.9" x 2.0").

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参考代码

Example code for Verilog, Litex, And RiscV can be found here:

交流社区

We have an OrangeCrab group on the 1BitSquared Discord

Licence

  • Hardware in this repository is licensed under CERN OHL v1.2
  • Gateware/Software/Firmware in this repository is licensed under MIT unless otherwise indicated

开源硬件

This board is an OSHWA approved design: AU000006

物料清单
附件下载
OrangeCrab.pdf
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